The memory bank can be used as a general purpose programmable logic device, or PLD. That means it can take up to 8 binary (digital) inputs, combine them using any possible logical formula and output up to 4 bits of binary data. This makes it a very powerful and compact logic processor. In effect, four complex logic functions may be performed, each one corresponding to one of the outputs. The only limitation is in the number of discrete inputs required for these functions. As long as the total is 8 or less, one bank will be sufficient.
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| - The memory bank can be used as a general purpose programmable logic device, or PLD. That means it can take up to 8 binary (digital) inputs, combine them using any possible logical formula and output up to 4 bits of binary data. This makes it a very powerful and compact logic processor. In effect, four complex logic functions may be performed, each one corresponding to one of the outputs. The only limitation is in the number of discrete inputs required for these functions. As long as the total is 8 or less, one bank will be sufficient.
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| - The memory bank can be used as a general purpose programmable logic device, or PLD. That means it can take up to 8 binary (digital) inputs, combine them using any possible logical formula and output up to 4 bits of binary data. This makes it a very powerful and compact logic processor. This article is very advanced and you need a solid background in logic design and a thorough understanding of the memory bank to get the most from it. An understanding of matrix mathematics is also helpful. Fortunately, the bank will be used in asynchronous mode so we won’t need to work with the clock input of the bank – for now… In effect, four complex logic functions may be performed, each one corresponding to one of the outputs. The only limitation is in the number of discrete inputs required for these functions. As long as the total is 8 or less, one bank will be sufficient. This article will use a manual method to compute the final bank program. The manual method uses a graph to represent the data matrix of the memory bank. There are automated PLD design tools that satisfy our needs but they are generally available to electrical engineers and require learning their use. If you already have these, feel free to experiment with them. If you develop a useable solution, please contact this wiki admins to see about adding that information to this page. An example problem will be used to illuminate the process. This is a ‘real-world’ problem that the author used in a world build. Links to the project are presented at the end.
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